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perf/uapi: Clean up <uapi/linux/perf_event.h> a bit

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When applying a recent commit to the <uapi/linux/perf_event.h>
header I noticed that we have accumulated quite a bit of
historic noise in this header, so do a bit of spring cleaning:

 - Define bitfields in a vertically aligned fashion, like
   perf_event_mmap_page::capabilities already does. This
   makes it easier to see the distribution and sizing of
   bits within a word, at a glance. The following is much
   more readable:

			__u64	cap_bit0		: 1,
				cap_bit0_is_deprecated	: 1,
				cap_user_rdpmc		: 1,
				cap_user_time		: 1,
				cap_user_time_zero	: 1,
				cap_user_time_short	: 1,
				cap_____res		: 58;

   Than:

			__u64	cap_bit0:1,
				cap_bit0_is_deprecated:1,
				cap_user_rdpmc:1,
				cap_user_time:1,
				cap_user_time_zero:1,
				cap_user_time_short:1,
				cap_____res:58;

   So convert all bitfield definitions from the latter style to the
   former style.

 - Fix typos and grammar

 - Fix capitalization

 - Remove whitespace noise

 - Harmonize the definitions of various generations and groups of
   PERF_MEM_ ABI values.

 - Vertically align all definitions and assignments to the same
   column (48), as the first definition (enum perf_type_id),
   throughout the entire header.

 - And in general make the code and comments to be more in sync
   with each other and to be more readable overall.

No change in functionality.

Copy the changes over to tools/include/uapi/linux/perf_event.h.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Ian Rogers <irogers@google.com>
Link: https://lore.kernel.org/r/20250521221529.2547099-1-irogers@google.com
This commit is contained in:
Ingo Molnar
2025-05-22 09:51:22 +02:00
committed by Andrii Nakryiko
parent bae6a269ca
commit 52b9b38a22
1 changed files with 322 additions and 312 deletions
Download Patch File Download Diff File Expand all files Collapse all files

340
include/uapi/linux/perf_event.h
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@@ -39,15 +39,18 @@ enum perf_type_id {
/* /*
* attr.config layout for type PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE * attr.config layout for type PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE
*
* PERF_TYPE_HARDWARE: 0xEEEEEEEE000000AA * PERF_TYPE_HARDWARE: 0xEEEEEEEE000000AA
* AA: hardware event ID * AA: hardware event ID
* EEEEEEEE: PMU type ID * EEEEEEEE: PMU type ID
*
* PERF_TYPE_HW_CACHE: 0xEEEEEEEE00DDCCBB * PERF_TYPE_HW_CACHE: 0xEEEEEEEE00DDCCBB
* BB: hardware cache ID * BB: hardware cache ID
* CC: hardware cache op ID * CC: hardware cache op ID
* DD: hardware cache op result ID * DD: hardware cache op result ID
* EEEEEEEE: PMU type ID * EEEEEEEE: PMU type ID
* If the PMU type ID is 0, the PERF_TYPE_RAW will be applied. *
* If the PMU type ID is 0, PERF_TYPE_RAW will be applied.
*/ */
#define PERF_PMU_TYPE_SHIFT 32 #define PERF_PMU_TYPE_SHIFT 32
#define PERF_HW_EVENT_MASK 0xffffffff #define PERF_HW_EVENT_MASK 0xffffffff
@@ -112,7 +115,7 @@ enum perf_hw_cache_op_result_id {
/* /*
* Special "software" events provided by the kernel, even if the hardware * Special "software" events provided by the kernel, even if the hardware
* does not support performance events. These events measure various * does not support performance events. These events measure various
* physical and sw events of the kernel (and allow the profiling of them as * physical and SW events of the kernel (and allow the profiling of them as
* well): * well):
*/ */
enum perf_sw_ids { enum perf_sw_ids {
@@ -167,8 +170,9 @@ enum perf_event_sample_format {
}; };
#define PERF_SAMPLE_WEIGHT_TYPE (PERF_SAMPLE_WEIGHT | PERF_SAMPLE_WEIGHT_STRUCT) #define PERF_SAMPLE_WEIGHT_TYPE (PERF_SAMPLE_WEIGHT | PERF_SAMPLE_WEIGHT_STRUCT)
/* /*
* values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set * Values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set.
* *
* If the user does not pass priv level information via branch_sample_type, * If the user does not pass priv level information via branch_sample_type,
* the kernel uses the event's priv level. Branch and event priv levels do * the kernel uses the event's priv level. Branch and event priv levels do
@@ -191,7 +195,7 @@ enum perf_branch_sample_type_shift {
PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9, /* not in transaction */ PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9, /* not in transaction */
PERF_SAMPLE_BRANCH_COND_SHIFT = 10, /* conditional branches */ PERF_SAMPLE_BRANCH_COND_SHIFT = 10, /* conditional branches */
PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11, /* call/ret stack */ PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11, /* CALL/RET stack */
PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT = 12, /* indirect jumps */ PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT = 12, /* indirect jumps */
PERF_SAMPLE_BRANCH_CALL_SHIFT = 13, /* direct call */ PERF_SAMPLE_BRANCH_CALL_SHIFT = 13, /* direct call */
@@ -230,8 +234,7 @@ enum perf_branch_sample_type {
PERF_SAMPLE_BRANCH_NO_FLAGS = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT, PERF_SAMPLE_BRANCH_NO_FLAGS = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT,
PERF_SAMPLE_BRANCH_NO_CYCLES = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT, PERF_SAMPLE_BRANCH_NO_CYCLES = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT,
PERF_SAMPLE_BRANCH_TYPE_SAVE = PERF_SAMPLE_BRANCH_TYPE_SAVE = 1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT,
1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT,
PERF_SAMPLE_BRANCH_HW_INDEX = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT, PERF_SAMPLE_BRANCH_HW_INDEX = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT,
@@ -243,30 +246,30 @@ enum perf_branch_sample_type {
}; };
/* /*
* Common flow change classification * Common control flow change classifications:
*/ */
enum { enum {
PERF_BR_UNKNOWN = 0, /* unknown */ PERF_BR_UNKNOWN = 0, /* Unknown */
PERF_BR_COND = 1, /* conditional */ PERF_BR_COND = 1, /* Conditional */
PERF_BR_UNCOND = 2, /* unconditional */ PERF_BR_UNCOND = 2, /* Unconditional */
PERF_BR_IND = 3, /* indirect */ PERF_BR_IND = 3, /* Indirect */
PERF_BR_CALL = 4, /* function call */ PERF_BR_CALL = 4, /* Function call */
PERF_BR_IND_CALL = 5, /* indirect function call */ PERF_BR_IND_CALL = 5, /* Indirect function call */
PERF_BR_RET = 6, /* function return */ PERF_BR_RET = 6, /* Function return */
PERF_BR_SYSCALL = 7, /* syscall */ PERF_BR_SYSCALL = 7, /* Syscall */
PERF_BR_SYSRET = 8, /* syscall return */ PERF_BR_SYSRET = 8, /* Syscall return */
PERF_BR_COND_CALL = 9, /* conditional function call */ PERF_BR_COND_CALL = 9, /* Conditional function call */
PERF_BR_COND_RET = 10, /* conditional function return */ PERF_BR_COND_RET = 10, /* Conditional function return */
PERF_BR_ERET = 11, /* exception return */ PERF_BR_ERET = 11, /* Exception return */
PERF_BR_IRQ = 12, /* irq */ PERF_BR_IRQ = 12, /* IRQ */
PERF_BR_SERROR = 13, /* system error */ PERF_BR_SERROR = 13, /* System error */
PERF_BR_NO_TX = 14, /* not in transaction */ PERF_BR_NO_TX = 14, /* Not in transaction */
PERF_BR_EXTEND_ABI = 15, /* extend ABI */ PERF_BR_EXTEND_ABI = 15, /* Extend ABI */
PERF_BR_MAX, PERF_BR_MAX,
}; };
/* /*
* Common branch speculation outcome classification * Common branch speculation outcome classifications:
*/ */
enum { enum {
PERF_BR_SPEC_NA = 0, /* Not available */ PERF_BR_SPEC_NA = 0, /* Not available */
@@ -323,7 +326,7 @@ enum {
PERF_TXN_ELISION = (1 << 0), /* From elision */ PERF_TXN_ELISION = (1 << 0), /* From elision */
PERF_TXN_TRANSACTION = (1 << 1), /* From transaction */ PERF_TXN_TRANSACTION = (1 << 1), /* From transaction */
PERF_TXN_SYNC = (1 << 2), /* Instruction is related */ PERF_TXN_SYNC = (1 << 2), /* Instruction is related */
PERF_TXN_ASYNC = (1 << 3), /* Instruction not related */ PERF_TXN_ASYNC = (1 << 3), /* Instruction is not related */
PERF_TXN_RETRY = (1 << 4), /* Retry possible */ PERF_TXN_RETRY = (1 << 4), /* Retry possible */
PERF_TXN_CONFLICT = (1 << 5), /* Conflict abort */ PERF_TXN_CONFLICT = (1 << 5), /* Conflict abort */
PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */ PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
@@ -331,7 +334,7 @@ enum {
PERF_TXN_MAX = (1 << 8), /* non-ABI */ PERF_TXN_MAX = (1 << 8), /* non-ABI */
/* bits 32..63 are reserved for the abort code */ /* Bits 32..63 are reserved for the abort code */
PERF_TXN_ABORT_MASK = (0xffffffffULL << 32), PERF_TXN_ABORT_MASK = (0xffffffffULL << 32),
PERF_TXN_ABORT_SHIFT = 32, PERF_TXN_ABORT_SHIFT = 32,
@@ -369,24 +372,22 @@ enum perf_event_read_format {
PERF_FORMAT_MAX = 1U << 5, /* non-ABI */ PERF_FORMAT_MAX = 1U << 5, /* non-ABI */
}; };
#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ #define PERF_ATTR_SIZE_VER0 64 /* Size of first published 'struct perf_event_attr' */
#define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ #define PERF_ATTR_SIZE_VER1 72 /* Add: config2 */
#define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ #define PERF_ATTR_SIZE_VER2 80 /* Add: branch_sample_type */
#define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */ #define PERF_ATTR_SIZE_VER3 96 /* Add: sample_regs_user */
/* add: sample_stack_user */ /* Add: sample_stack_user */
#define PERF_ATTR_SIZE_VER4 104 /* add: sample_regs_intr */ #define PERF_ATTR_SIZE_VER4 104 /* Add: sample_regs_intr */
#define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */ #define PERF_ATTR_SIZE_VER5 112 /* Add: aux_watermark */
#define PERF_ATTR_SIZE_VER6 120 /* add: aux_sample_size */ #define PERF_ATTR_SIZE_VER6 120 /* Add: aux_sample_size */
#define PERF_ATTR_SIZE_VER7 128 /* add: sig_data */ #define PERF_ATTR_SIZE_VER7 128 /* Add: sig_data */
#define PERF_ATTR_SIZE_VER8 136 /* add: config3 */ #define PERF_ATTR_SIZE_VER8 136 /* Add: config3 */
/* /*
* Hardware event_id to monitor via a performance monitoring event: * 'struct perf_event_attr' contains various attributes that define
* * a performance event - most of them hardware related configuration
* @sample_max_stack: Max number of frame pointers in a callchain, * details, but also a lot of behavioral switches and values implemented
* should be < /proc/sys/kernel/perf_event_max_stack * by the kernel.
* Max number of entries of branch stack
* should be < hardware limit
*/ */
struct perf_event_attr { struct perf_event_attr {
@@ -396,7 +397,7 @@ struct perf_event_attr {
__u32 type; __u32 type;
/* /*
* Size of the attr structure, for fwd/bwd compat. * Size of the attr structure, for forward/backwards compatibility.
*/ */
__u32 size; __u32 size;
@@ -451,21 +452,21 @@ struct perf_event_attr {
comm_exec : 1, /* flag comm events that are due to an exec */ comm_exec : 1, /* flag comm events that are due to an exec */
use_clockid : 1, /* use @clockid for time fields */ use_clockid : 1, /* use @clockid for time fields */
context_switch : 1, /* context switch data */ context_switch : 1, /* context switch data */
write_backward : 1, /* Write ring buffer from end to beginning */ write_backward : 1, /* write ring buffer from end to beginning */
namespaces : 1, /* include namespaces data */ namespaces : 1, /* include namespaces data */
ksymbol : 1, /* include ksymbol events */ ksymbol : 1, /* include ksymbol events */
bpf_event : 1, /* include bpf events */ bpf_event : 1, /* include BPF events */
aux_output : 1, /* generate AUX records instead of events */ aux_output : 1, /* generate AUX records instead of events */
cgroup : 1, /* include cgroup events */ cgroup : 1, /* include cgroup events */
text_poke : 1, /* include text poke events */ text_poke : 1, /* include text poke events */
build_id : 1, /* use build id in mmap2 events */ build_id : 1, /* use build ID in mmap2 events */
inherit_thread : 1, /* children only inherit if cloned with CLONE_THREAD */ inherit_thread : 1, /* children only inherit if cloned with CLONE_THREAD */
remove_on_exec : 1, /* event is removed from task on exec */ remove_on_exec : 1, /* event is removed from task on exec */
sigtrap : 1, /* send synchronous SIGTRAP on event */ sigtrap : 1, /* send synchronous SIGTRAP on event */
__reserved_1 : 26; __reserved_1 : 26;
union { union {
__u32 wakeup_events; /* wakeup every n events */ __u32 wakeup_events; /* wake up every n events */
__u32 wakeup_watermark; /* bytes before wakeup */ __u32 wakeup_watermark; /* bytes before wakeup */
}; };
@@ -510,7 +511,16 @@ struct perf_event_attr {
* Wakeup watermark for AUX area * Wakeup watermark for AUX area
*/ */
__u32 aux_watermark; __u32 aux_watermark;
/*
* Max number of frame pointers in a callchain, should be
* lower than /proc/sys/kernel/perf_event_max_stack.
*
* Max number of entries of branch stack should be lower
* than the hardware limit.
*/
__u16 sample_max_stack; __u16 sample_max_stack;
__u16 __reserved_2; __u16 __reserved_2;
__u32 aux_sample_size; __u32 aux_sample_size;
@@ -537,7 +547,7 @@ struct perf_event_attr {
/* /*
* Structure used by below PERF_EVENT_IOC_QUERY_BPF command * Structure used by below PERF_EVENT_IOC_QUERY_BPF command
* to query bpf programs attached to the same perf tracepoint * to query BPF programs attached to the same perf tracepoint
* as the given perf event. * as the given perf event.
*/ */
struct perf_event_query_bpf { struct perf_event_query_bpf {
@@ -563,14 +573,14 @@ struct perf_event_query_bpf {
#define PERF_EVENT_IOC_DISABLE _IO ('$', 1) #define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
#define PERF_EVENT_IOC_REFRESH _IO ('$', 2) #define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
#define PERF_EVENT_IOC_RESET _IO ('$', 3) #define PERF_EVENT_IOC_RESET _IO ('$', 3)
#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) #define PERF_EVENT_IOC_PERIOD _IOW ('$', 4, __u64)
#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) #define PERF_EVENT_IOC_SET_FILTER _IOW ('$', 6, char *)
#define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *) #define PERF_EVENT_IOC_ID _IOR ('$', 7, __u64 *)
#define PERF_EVENT_IOC_SET_BPF _IOW('$', 8, __u32) #define PERF_EVENT_IOC_SET_BPF _IOW ('$', 8, __u32)
#define PERF_EVENT_IOC_PAUSE_OUTPUT _IOW('$', 9, __u32) #define PERF_EVENT_IOC_PAUSE_OUTPUT _IOW ('$', 9, __u32)
#define PERF_EVENT_IOC_QUERY_BPF _IOWR('$', 10, struct perf_event_query_bpf *) #define PERF_EVENT_IOC_QUERY_BPF _IOWR('$', 10, struct perf_event_query_bpf *)
#define PERF_EVENT_IOC_MODIFY_ATTRIBUTES _IOW('$', 11, struct perf_event_attr *) #define PERF_EVENT_IOC_MODIFY_ATTRIBUTES _IOW ('$', 11, struct perf_event_attr *)
enum perf_event_ioc_flags { enum perf_event_ioc_flags {
PERF_IOC_FLAG_GROUP = 1U << 0, PERF_IOC_FLAG_GROUP = 1U << 0,
@@ -584,7 +594,7 @@ struct perf_event_mmap_page {
__u32 compat_version; /* lowest version this is compat with */ __u32 compat_version; /* lowest version this is compat with */
/* /*
* Bits needed to read the hw events in user-space. * Bits needed to read the HW events in user-space.
* *
* u32 seq, time_mult, time_shift, index, width; * u32 seq, time_mult, time_shift, index, width;
* u64 count, enabled, running; * u64 count, enabled, running;
@@ -622,7 +632,7 @@ struct perf_event_mmap_page {
__u32 index; /* hardware event identifier */ __u32 index; /* hardware event identifier */
__s64 offset; /* add to hardware event value */ __s64 offset; /* add to hardware event value */
__u64 time_enabled; /* time event active */ __u64 time_enabled; /* time event active */
__u64 time_running; /* time event on cpu */ __u64 time_running; /* time event on CPU */
union { union {
__u64 capabilities; __u64 capabilities;
struct { struct {
@@ -650,7 +660,7 @@ struct perf_event_mmap_page {
/* /*
* If cap_usr_time the below fields can be used to compute the time * If cap_usr_time the below fields can be used to compute the time
* delta since time_enabled (in ns) using rdtsc or similar. * delta since time_enabled (in ns) using RDTSC or similar.
* *
* u64 quot, rem; * u64 quot, rem;
* u64 delta; * u64 delta;
@@ -723,7 +733,7 @@ struct perf_event_mmap_page {
* after reading this value. * after reading this value.
* *
* When the mapping is PROT_WRITE the @data_tail value should be * When the mapping is PROT_WRITE the @data_tail value should be
* written by userspace to reflect the last read data, after issueing * written by user-space to reflect the last read data, after issuing
* an smp_mb() to separate the data read from the ->data_tail store. * an smp_mb() to separate the data read from the ->data_tail store.
* In this case the kernel will not over-write unread data. * In this case the kernel will not over-write unread data.
* *
@@ -739,7 +749,7 @@ struct perf_event_mmap_page {
/* /*
* AUX area is defined by aux_{offset,size} fields that should be set * AUX area is defined by aux_{offset,size} fields that should be set
* by the userspace, so that * by the user-space, so that
* *
* aux_offset >= data_offset + data_size * aux_offset >= data_offset + data_size
* *
@@ -813,7 +823,7 @@ struct perf_event_mmap_page {
* Indicates that thread was preempted in TASK_RUNNING state. * Indicates that thread was preempted in TASK_RUNNING state.
* *
* PERF_RECORD_MISC_MMAP_BUILD_ID: * PERF_RECORD_MISC_MMAP_BUILD_ID:
* Indicates that mmap2 event carries build id data. * Indicates that mmap2 event carries build ID data.
*/ */
#define PERF_RECORD_MISC_EXACT_IP (1 << 14) #define PERF_RECORD_MISC_EXACT_IP (1 << 14)
#define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT (1 << 14) #define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT (1 << 14)
@@ -874,7 +884,7 @@ enum perf_event_type {
/* /*
* The MMAP events record the PROT_EXEC mappings so that we can * The MMAP events record the PROT_EXEC mappings so that we can
* correlate userspace IPs to code. They have the following structure: * correlate user-space IPs to code. They have the following structure:
* *
* struct { * struct {
* struct perf_event_header header; * struct perf_event_header header;
@@ -1168,7 +1178,7 @@ enum perf_event_type {
PERF_RECORD_KSYMBOL = 17, PERF_RECORD_KSYMBOL = 17,
/* /*
* Record bpf events: * Record BPF events:
* enum perf_bpf_event_type { * enum perf_bpf_event_type {
* PERF_BPF_EVENT_UNKNOWN = 0, * PERF_BPF_EVENT_UNKNOWN = 0,
* PERF_BPF_EVENT_PROG_LOAD = 1, * PERF_BPF_EVENT_PROG_LOAD = 1,
@@ -1270,10 +1280,10 @@ enum perf_callchain_context {
/** /**
* PERF_RECORD_AUX::flags bits * PERF_RECORD_AUX::flags bits
*/ */
#define PERF_AUX_FLAG_TRUNCATED 0x01 /* record was truncated to fit */ #define PERF_AUX_FLAG_TRUNCATED 0x0001 /* Record was truncated to fit */
#define PERF_AUX_FLAG_OVERWRITE 0x02 /* snapshot from overwrite mode */ #define PERF_AUX_FLAG_OVERWRITE 0x0002 /* Snapshot from overwrite mode */
#define PERF_AUX_FLAG_PARTIAL 0x04 /* record contains gaps */ #define PERF_AUX_FLAG_PARTIAL 0x0004 /* Record contains gaps */
#define PERF_AUX_FLAG_COLLISION 0x08 /* sample collided with another */ #define PERF_AUX_FLAG_COLLISION 0x0008 /* Sample collided with another */
#define PERF_AUX_FLAG_PMU_FORMAT_TYPE_MASK 0xff00 /* PMU specific trace format type */ #define PERF_AUX_FLAG_PMU_FORMAT_TYPE_MASK 0xff00 /* PMU specific trace format type */
/* CoreSight PMU AUX buffer formats */ /* CoreSight PMU AUX buffer formats */
@@ -1282,137 +1292,137 @@ enum perf_callchain_context {
#define PERF_FLAG_FD_NO_GROUP (1UL << 0) #define PERF_FLAG_FD_NO_GROUP (1UL << 0)
#define PERF_FLAG_FD_OUTPUT (1UL << 1) #define PERF_FLAG_FD_OUTPUT (1UL << 1)
#define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */ #define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup ID, per-CPU mode only */
#define PERF_FLAG_FD_CLOEXEC (1UL << 3) /* O_CLOEXEC */ #define PERF_FLAG_FD_CLOEXEC (1UL << 3) /* O_CLOEXEC */
#if defined(__LITTLE_ENDIAN_BITFIELD) #if defined(__LITTLE_ENDIAN_BITFIELD)
union perf_mem_data_src { union perf_mem_data_src {
__u64 val; __u64 val;
struct { struct {
__u64 mem_op:5, /* type of opcode */ __u64 mem_op : 5, /* Type of opcode */
mem_lvl:14, /* memory hierarchy level */ mem_lvl : 14, /* Memory hierarchy level */
mem_snoop:5, /* snoop mode */ mem_snoop : 5, /* Snoop mode */
mem_lock:2, /* lock instr */ mem_lock : 2, /* Lock instr */
mem_dtlb:7, /* tlb access */ mem_dtlb : 7, /* TLB access */
mem_lvl_num:4, /* memory hierarchy level number */ mem_lvl_num : 4, /* Memory hierarchy level number */
mem_remote:1, /* remote */ mem_remote : 1, /* Remote */
mem_snoopx:2, /* snoop mode, ext */ mem_snoopx : 2, /* Snoop mode, ext */
mem_blk:3, /* access blocked */ mem_blk : 3, /* Access blocked */
mem_hops:3, /* hop level */ mem_hops : 3, /* Hop level */
mem_rsvd:18; mem_rsvd : 18;
}; };
}; };
#elif defined(__BIG_ENDIAN_BITFIELD) #elif defined(__BIG_ENDIAN_BITFIELD)
union perf_mem_data_src { union perf_mem_data_src {
__u64 val; __u64 val;
struct { struct {
__u64 mem_rsvd:18, __u64 mem_rsvd : 18,
mem_hops:3, /* hop level */ mem_hops : 3, /* Hop level */
mem_blk:3, /* access blocked */ mem_blk : 3, /* Access blocked */
mem_snoopx:2, /* snoop mode, ext */ mem_snoopx : 2, /* Snoop mode, ext */
mem_remote:1, /* remote */ mem_remote : 1, /* Remote */
mem_lvl_num:4, /* memory hierarchy level number */ mem_lvl_num : 4, /* Memory hierarchy level number */
mem_dtlb:7, /* tlb access */ mem_dtlb : 7, /* TLB access */
mem_lock:2, /* lock instr */ mem_lock : 2, /* Lock instr */
mem_snoop:5, /* snoop mode */ mem_snoop : 5, /* Snoop mode */
mem_lvl:14, /* memory hierarchy level */ mem_lvl : 14, /* Memory hierarchy level */
mem_op:5; /* type of opcode */ mem_op : 5; /* Type of opcode */
}; };
}; };
#else #else
#error "Unknown endianness" # error "Unknown endianness"
#endif #endif
/* type of opcode (load/store/prefetch,code) */ /* Type of memory opcode: */
#define PERF_MEM_OP_NA 0x01 /* not available */ #define PERF_MEM_OP_NA 0x0001 /* Not available */
#define PERF_MEM_OP_LOAD 0x02 /* load instruction */ #define PERF_MEM_OP_LOAD 0x0002 /* Load instruction */
#define PERF_MEM_OP_STORE 0x04 /* store instruction */ #define PERF_MEM_OP_STORE 0x0004 /* Store instruction */
#define PERF_MEM_OP_PFETCH 0x08 /* prefetch */ #define PERF_MEM_OP_PFETCH 0x0008 /* Prefetch */
#define PERF_MEM_OP_EXEC 0x10 /* code (execution) */ #define PERF_MEM_OP_EXEC 0x0010 /* Code (execution) */
#define PERF_MEM_OP_SHIFT 0 #define PERF_MEM_OP_SHIFT 0
/* /*
* PERF_MEM_LVL_* namespace being depricated to some extent in the * The PERF_MEM_LVL_* namespace is being deprecated to some extent in
* favour of newer composite PERF_MEM_{LVLNUM_,REMOTE_,SNOOPX_} fields. * favour of newer composite PERF_MEM_{LVLNUM_,REMOTE_,SNOOPX_} fields.
* Supporting this namespace inorder to not break defined ABIs. * We support this namespace in order to not break defined ABIs.
* *
* memory hierarchy (memory level, hit or miss) * Memory hierarchy (memory level, hit or miss)
*/ */
#define PERF_MEM_LVL_NA 0x01 /* not available */ #define PERF_MEM_LVL_NA 0x0001 /* Not available */
#define PERF_MEM_LVL_HIT 0x02 /* hit level */ #define PERF_MEM_LVL_HIT 0x0002 /* Hit level */
#define PERF_MEM_LVL_MISS 0x04 /* miss level */ #define PERF_MEM_LVL_MISS 0x0004 /* Miss level */
#define PERF_MEM_LVL_L1 0x08 /* L1 */ #define PERF_MEM_LVL_L1 0x0008 /* L1 */
#define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */ #define PERF_MEM_LVL_LFB 0x0010 /* Line Fill Buffer */
#define PERF_MEM_LVL_L2 0x20 /* L2 */ #define PERF_MEM_LVL_L2 0x0020 /* L2 */
#define PERF_MEM_LVL_L3 0x40 /* L3 */ #define PERF_MEM_LVL_L3 0x0040 /* L3 */
#define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */ #define PERF_MEM_LVL_LOC_RAM 0x0080 /* Local DRAM */
#define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */ #define PERF_MEM_LVL_REM_RAM1 0x0100 /* Remote DRAM (1 hop) */
#define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */ #define PERF_MEM_LVL_REM_RAM2 0x0200 /* Remote DRAM (2 hops) */
#define PERF_MEM_LVL_REM_CCE1 0x400 /* Remote Cache (1 hop) */ #define PERF_MEM_LVL_REM_CCE1 0x0400 /* Remote Cache (1 hop) */
#define PERF_MEM_LVL_REM_CCE2 0x800 /* Remote Cache (2 hops) */ #define PERF_MEM_LVL_REM_CCE2 0x0800 /* Remote Cache (2 hops) */
#define PERF_MEM_LVL_IO 0x1000 /* I/O memory */ #define PERF_MEM_LVL_IO 0x1000 /* I/O memory */
#define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */ #define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */
#define PERF_MEM_LVL_SHIFT 5 #define PERF_MEM_LVL_SHIFT 5
#define PERF_MEM_REMOTE_REMOTE 0x01 /* Remote */ #define PERF_MEM_REMOTE_REMOTE 0x0001 /* Remote */
#define PERF_MEM_REMOTE_SHIFT 37 #define PERF_MEM_REMOTE_SHIFT 37
#define PERF_MEM_LVLNUM_L1 0x01 /* L1 */ #define PERF_MEM_LVLNUM_L1 0x0001 /* L1 */
#define PERF_MEM_LVLNUM_L2 0x02 /* L2 */ #define PERF_MEM_LVLNUM_L2 0x0002 /* L2 */
#define PERF_MEM_LVLNUM_L3 0x03 /* L3 */ #define PERF_MEM_LVLNUM_L3 0x0003 /* L3 */
#define PERF_MEM_LVLNUM_L4 0x04 /* L4 */ #define PERF_MEM_LVLNUM_L4 0x0004 /* L4 */
#define PERF_MEM_LVLNUM_L2_MHB 0x05 /* L2 Miss Handling Buffer */ #define PERF_MEM_LVLNUM_L2_MHB 0x0005 /* L2 Miss Handling Buffer */
#define PERF_MEM_LVLNUM_MSC 0x06 /* Memory-side Cache */ #define PERF_MEM_LVLNUM_MSC 0x0006 /* Memory-side Cache */
/* 0x7 available */ /* 0x007 available */
#define PERF_MEM_LVLNUM_UNC 0x08 /* Uncached */ #define PERF_MEM_LVLNUM_UNC 0x0008 /* Uncached */
#define PERF_MEM_LVLNUM_CXL 0x09 /* CXL */ #define PERF_MEM_LVLNUM_CXL 0x0009 /* CXL */
#define PERF_MEM_LVLNUM_IO 0x0a /* I/O */ #define PERF_MEM_LVLNUM_IO 0x000a /* I/O */
#define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */ #define PERF_MEM_LVLNUM_ANY_CACHE 0x000b /* Any cache */
#define PERF_MEM_LVLNUM_LFB 0x0c /* LFB / L1 Miss Handling Buffer */ #define PERF_MEM_LVLNUM_LFB 0x000c /* LFB / L1 Miss Handling Buffer */
#define PERF_MEM_LVLNUM_RAM 0x0d /* RAM */ #define PERF_MEM_LVLNUM_RAM 0x000d /* RAM */
#define PERF_MEM_LVLNUM_PMEM 0x0e /* PMEM */ #define PERF_MEM_LVLNUM_PMEM 0x000e /* PMEM */
#define PERF_MEM_LVLNUM_NA 0x0f /* N/A */ #define PERF_MEM_LVLNUM_NA 0x000f /* N/A */
#define PERF_MEM_LVLNUM_SHIFT 33 #define PERF_MEM_LVLNUM_SHIFT 33
/* snoop mode */ /* Snoop mode */
#define PERF_MEM_SNOOP_NA 0x01 /* not available */ #define PERF_MEM_SNOOP_NA 0x0001 /* Not available */
#define PERF_MEM_SNOOP_NONE 0x02 /* no snoop */ #define PERF_MEM_SNOOP_NONE 0x0002 /* No snoop */
#define PERF_MEM_SNOOP_HIT 0x04 /* snoop hit */ #define PERF_MEM_SNOOP_HIT 0x0004 /* Snoop hit */
#define PERF_MEM_SNOOP_MISS 0x08 /* snoop miss */ #define PERF_MEM_SNOOP_MISS 0x0008 /* Snoop miss */
#define PERF_MEM_SNOOP_HITM 0x10 /* snoop hit modified */ #define PERF_MEM_SNOOP_HITM 0x0010 /* Snoop hit modified */
#define PERF_MEM_SNOOP_SHIFT 19 #define PERF_MEM_SNOOP_SHIFT 19
#define PERF_MEM_SNOOPX_FWD 0x01 /* forward */ #define PERF_MEM_SNOOPX_FWD 0x0001 /* Forward */
#define PERF_MEM_SNOOPX_PEER 0x02 /* xfer from peer */ #define PERF_MEM_SNOOPX_PEER 0x0002 /* Transfer from peer */
#define PERF_MEM_SNOOPX_SHIFT 38 #define PERF_MEM_SNOOPX_SHIFT 38
/* locked instruction */ /* Locked instruction */
#define PERF_MEM_LOCK_NA 0x01 /* not available */ #define PERF_MEM_LOCK_NA 0x0001 /* Not available */
#define PERF_MEM_LOCK_LOCKED 0x02 /* locked transaction */ #define PERF_MEM_LOCK_LOCKED 0x0002 /* Locked transaction */
#define PERF_MEM_LOCK_SHIFT 24 #define PERF_MEM_LOCK_SHIFT 24
/* TLB access */ /* TLB access */
#define PERF_MEM_TLB_NA 0x01 /* not available */ #define PERF_MEM_TLB_NA 0x0001 /* Not available */
#define PERF_MEM_TLB_HIT 0x02 /* hit level */ #define PERF_MEM_TLB_HIT 0x0002 /* Hit level */
#define PERF_MEM_TLB_MISS 0x04 /* miss level */ #define PERF_MEM_TLB_MISS 0x0004 /* Miss level */
#define PERF_MEM_TLB_L1 0x08 /* L1 */ #define PERF_MEM_TLB_L1 0x0008 /* L1 */
#define PERF_MEM_TLB_L2 0x10 /* L2 */ #define PERF_MEM_TLB_L2 0x0010 /* L2 */
#define PERF_MEM_TLB_WK 0x20 /* Hardware Walker*/ #define PERF_MEM_TLB_WK 0x0020 /* Hardware Walker*/
#define PERF_MEM_TLB_OS 0x40 /* OS fault handler */ #define PERF_MEM_TLB_OS 0x0040 /* OS fault handler */
#define PERF_MEM_TLB_SHIFT 26 #define PERF_MEM_TLB_SHIFT 26
/* Access blocked */ /* Access blocked */
#define PERF_MEM_BLK_NA 0x01 /* not available */ #define PERF_MEM_BLK_NA 0x0001 /* Not available */
#define PERF_MEM_BLK_DATA 0x02 /* data could not be forwarded */ #define PERF_MEM_BLK_DATA 0x0002 /* Data could not be forwarded */
#define PERF_MEM_BLK_ADDR 0x04 /* address conflict */ #define PERF_MEM_BLK_ADDR 0x0004 /* Address conflict */
#define PERF_MEM_BLK_SHIFT 40 #define PERF_MEM_BLK_SHIFT 40
/* hop level */ /* Hop level */
#define PERF_MEM_HOPS_0 0x01 /* remote core, same node */ #define PERF_MEM_HOPS_0 0x0001 /* Remote core, same node */
#define PERF_MEM_HOPS_1 0x02 /* remote node, same socket */ #define PERF_MEM_HOPS_1 0x0002 /* Remote node, same socket */
#define PERF_MEM_HOPS_2 0x03 /* remote socket, same board */ #define PERF_MEM_HOPS_2 0x0003 /* Remote socket, same board */
#define PERF_MEM_HOPS_3 0x04 /* remote board */ #define PERF_MEM_HOPS_3 0x0004 /* Remote board */
/* 5-7 available */ /* 5-7 available */
#define PERF_MEM_HOPS_SHIFT 43 #define PERF_MEM_HOPS_SHIFT 43
@@ -1420,7 +1430,7 @@ union perf_mem_data_src {
(((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
/* /*
* single taken branch record layout: * Layout of single taken branch records:
* *
* from: source instruction (may not always be a branch insn) * from: source instruction (may not always be a branch insn)
* to: branch target * to: branch target
@@ -1439,16 +1449,16 @@ union perf_mem_data_src {
struct perf_branch_entry { struct perf_branch_entry {
__u64 from; __u64 from;
__u64 to; __u64 to;
__u64 mispred:1, /* target mispredicted */ __u64 mispred : 1, /* target mispredicted */
predicted:1,/* target predicted */ predicted : 1, /* target predicted */
in_tx:1, /* in transaction */ in_tx : 1, /* in transaction */
abort:1, /* transaction abort */ abort : 1, /* transaction abort */
cycles:16, /* cycle count to last branch */ cycles : 16, /* cycle count to last branch */
type:4, /* branch type */ type : 4, /* branch type */
spec:2, /* branch speculation info */ spec : 2, /* branch speculation info */
new_type:4, /* additional branch type */ new_type : 4, /* additional branch type */
priv:3, /* privilege level */ priv : 3, /* privilege level */
reserved:31; reserved : 31;
}; };
/* Size of used info bits in struct perf_branch_entry */ /* Size of used info bits in struct perf_branch_entry */
@@ -1469,7 +1479,7 @@ union perf_sample_weight {
__u32 var1_dw; __u32 var1_dw;
}; };
#else #else
#error "Unknown endianness" # error "Unknown endianness"
#endif #endif
}; };