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sync: latest tooling changes from kernel

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[ upstream commit 6b7a21140fca461c6d8d5c65a3746e7da50a409e ]

Needed a custom backport. I've changed fallbacks so that we can
partially pull in barriers step by step. I've fixed x86 ones and
added corresponding arm64 barriers.

Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
This commit is contained in:
Daniel Borkmann
2019-04-12 00:42:07 +02:00
committed by yonghong-song
parent 5844f6e4dd
commit dd3fc8bde1
1 changed files with 38 additions and 20 deletions
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58
include/linux/compiler.h
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@@ -13,8 +13,9 @@
#if defined(__x86_64__) #if defined(__x86_64__)
# define smp_rmb() asm volatile("lfence" ::: "memory") # define smp_rmb() barrier()
# define smp_wmb() asm volatile("sfence" ::: "memory") # define smp_wmb() barrier()
# define smp_mb() asm volatile("lock; addl $0,-132(%%rsp)" ::: "memory", "cc")
# define smp_store_release(p, v) \ # define smp_store_release(p, v) \
do { \ do { \
@@ -29,24 +30,41 @@ do { \
___p; \ ___p; \
}) })
#else #elif defined(__aarch64__)
# define smp_mb() __sync_synchronize() # define smp_rmb() asm volatile("dmb ishld" ::: "memory")
# define smp_rmb() smp_mb() # define smp_wmb() asm volatile("dmb ishst" ::: "memory")
# define smp_wmb() smp_mb() # define smp_mb() asm volatile("dmb ish" ::: "memory")
# define smp_store_release(p, v) \
do { \
smp_mb(); \
WRITE_ONCE(*p, v); \
} while (0)
# define smp_load_acquire(p) \
({ \
typeof(*p) ___p = READ_ONCE(*p); \
smp_mb(); \
___p; \
})
#endif /* defined(__x86_64__) */
#endif #endif
#ifndef smp_mb
# define smp_mb() __sync_synchronize()
#endif
#ifndef smp_rmb
# define smp_rmb() smp_mb()
#endif
#ifndef smp_wmb
# define smp_wmb() smp_mb()
#endif
#ifndef smp_store_release
# define smp_store_release(p, v) \
do { \
smp_mb(); \
WRITE_ONCE(*p, v); \
} while (0)
#endif
#ifndef smp_load_acquire
# define smp_load_acquire(p) \
({ \
typeof(*p) ___p = READ_ONCE(*p); \
smp_mb(); \
___p; \
})
#endif
#endif /* __LINUX_COMPILER_H */